| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.060 INCHES MAXIMUM |
| BODY LENGTH | 0.260 INCHES MAXIMUM |
| BODY WIDTH | 0.260 INCHES MAXIMUM |
| DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, J-K, CLOCKED |
| FEATURES PROVIDED | INTERNALLY COMPENSATED AND NEGATIVE EDGE TRIGGERED AND SYNCHRONOUS AND ASYNCHRONOUS AND PRESETTABLE AND RESETTABLE AND W/ENABLE AND HERMETICALLY SEALED AND MONOLITHIC |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 10 INPUT |
| MAXIMUM POWER DISSIPATION RATING | 100.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| STORAGE TEMP RANGE | -65.0 TO 200.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
| TEST DATA DOCUMENT | 05869-717320 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 15.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |