| BODY HEIGHT | 0.170 INCHES MINIMUM AND 0.180 INCHES MAXIMUM |
| BODY OUTSIDE DIAMETER | 0.355 INCHES MINIMUM AND 0.370 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-5 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 2 GATE, NOR |
| FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS |
| INCLOSURE CONFIGURATION | CAN |
| INCLOSURE MATERIAL | GLASS AND METAL |
| INPUT CIRCUIT PATTERN | DUAL 3 INPUT |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| OPERATING TEMP RANGE | +0.0 TO 65.0 CELSIUS |
| TERMINAL TYPE AND QUANTITY | 10 PIN |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TIME RATING PER CHACTERISTIC | 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |