| BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
| BODY LENGTH | 0.240 INCHES MINIMUM AND 0.290 INCHES MAXIMUM |
| BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-91 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, J-K, CLOCKED |
| FEATURES PROVIDED | MONOLITHIC AND HERMETICALLY SEALED AND POSITIVE OUTPUTS AND NEGATIVE OUTPUTS AND MEDIUM POWER AND MEDIUM SPEED AND W/ENABLE AND EDGE TRIGGERED |
| INCLOSURE CONFIGURATION | FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC AND GLASS |
| INPUT CIRCUIT PATTERN | 4 INPUT |
| MAXIMUM POWER DISSIPATION RATING | 91.0 MILLIWATTS |
| OPERATING TEMP RANGE | +15.0 TO 55.0 CELSIUS |
| OUTPUT LOGIC FORM | RESISTOR-TRANSISTOR LOGIC |
| STORAGE TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 10 FLAT LEADS |
| TIME RATING PER CHACTERISTIC | 30.00 NANOSECONDS NOMINAL PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -4.0 VOLTS MINIMUM POWER SOURCE AND 4.0 VOLTS MAXIMUM POWER SOURCE |