BODY HEIGHT | 0.030 INCHES MINIMUM AND 0.070 INCHES MAXIMUM |
BODY LENGTH | 0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
BODY WIDTH | 0.240 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
CASE OUTLINE SOURCE AND DESIGNATOR | T0-86 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
DESIGN FUNCTION AND QUANTITY | 1 FLIP-FLOP, J-K, AND/OR INPUT AND 1 FLIP-FLOP, J-K, CLOCKED AND 1 FLIP-FLOP, J-K, MASTER SLAVE |
FEATURES PROVIDED | HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND HIGH SPEED AND PRESETTABLE AND W/ENABLE |
INCLOSURE CONFIGURATION | FLAT PACK |
INCLOSURE MATERIAL | CERAMIC AND GLASS |
INPUT CIRCUIT PATTERN | 10 INPUT |
MAXIMUM POWER DISSIPATION RATING | 150.0 MILLIWATTS |
OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
PRECIOUS MATERIAL | GOLD |
PRECIOUS MATERIAL AND LOCATION | TERMINALS GOLD |
STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
TERMINAL SURFACE TREATMENT | GOLD |
TERMINAL TYPE AND QUANTITY | 14 FLAT LEADS |
TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
TIME RATING PER CHACTERISTIC | 21.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 27.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -1.5 VOLTS MINIMUM POWER SOURCE AND 5.5 VOLTS MAXIMUM POWER SOURCE |