| DESIGN FUNCTION AND QUANTITY | 1 GATE, ANALOG |
| BODY HEIGHT | 0.165 INCHES MINIMUM AND 0.185 INCHES MAXIMUM |
| BODY OUTSIDE DIAMETER | 0.335 INCHES MINIMUM AND 0.370 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | T0-100 JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| FEATURES PROVIDED | HERMETICALLY SEALED AND HIGH SPEED AND W/FIELD EFFECT TRANSISTOR SWITCH |
| INCLOSURE CONFIGURATION | CAN |
| INCLOSURE MATERIAL | METAL |
| INPUT CIRCUIT PATTERN | 2 INPUT |
| PRECIOUS MATERIAL | GOLD |
| PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACES GOLD |
| PROPRIETARY CHARACTERISTICS | PACS |
| OPERATING TEMP RANGE | -55.0/+125.0 DEG CELSIUS |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.0 VOLTS NOMINAL POWER SOURCE |
| STORAGE TEMP RANGE | -55.0/+155.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 10 PIN |
| TERMINAL SURFACE TREATMENT | GOLD |
| TEST DATA DOCUMENT | 18876-11567757 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 50.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |