| DESIGN FUNCTION AND QUANTITY | 4 GATE, NAND |
| BODY HEIGHT | 0.125 INCHES MAXIMUM |
| BODY LENGTH | 0.685 INCHES MINIMUM AND 0.715 INCHES MAXIMUM |
| BODY WIDTH | 0.235 INCHES MINIMUM AND 0.265 INCHES MAXIMUM |
| FEATURES PROVIDED | MONOLITHIC |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| INCLOSURE MATERIAL | CERAMIC |
| INPUT CIRCUIT PATTERN | QUAD 2 INPUT |
| PRECIOUS MATERIAL | GOLD |
| PRECIOUS MATERIAL AND LOCATION | TERMINAL SURFACES GOLD |
| PROPRIETARY CHARACTERISTICS | PACS |
| MAXIMUM POWER DISSIPATION RATING | 100.0 MILLIWATTS |
| OPERATING TEMP RANGE | -54.0/+125.0 DEG CELSIUS |
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | 5.5 VOLTS NOMINAL POWER SOURCE |
| STORAGE TEMP RANGE | -65.0/+200.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 14 PRINTED CIRCUIT |
| TERMINAL SURFACE TREATMENT | GOLD |
| TEST DATA DOCUMENT | 55180-98-0011-000 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| TIME RATING PER CHACTERISTIC | 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |