| BODY HEIGHT | 0.060 INCHES MINIMUM AND 0.100 INCHES MAXIMUM |
| BODY LENGTH | 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM |
| BODY WIDTH | 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM |
| CASE OUTLINE SOURCE AND DESIGNATOR | C-2 MIL-M-38510 |
| DESIGN FUNCTION AND QUANTITY | 3 GATE, NAND |
| FEATURES PROVIDED | BURN IN AND HERMETICALLY SEALED AND HIGH SPEED AND MONOLITHIC |
| INCLOSURE CONFIGURATION | LEADED CHIP CARRIER |
| INCLOSURE MATERIAL | CERAMIC |
| INPUT CIRCUIT PATTERN | TRIPLE 3 INPUT |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | CERAMIC CHIP CARRIER ASSY, FLAT J-LEAD |
| MAXIMUM POWER DISSIPATION RATING | 300.0 MILLIWATTS |
| OPERATING TEMP RANGE | -55.0 TO 125.0 CELSIUS |
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| SPECIAL FEATURES | ADDING J-LEAD TO 5962-3865002B2A |
| STORAGE TEMP RANGE | -65.0 TO 150.0 CELSIUS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| TERMINAL TYPE AND QUANTITY | 20 J-HOOK |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |
| TIME RATING PER CHACTERISTIC | 23.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 23.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | -0.5 VOLTS MINIMUM POWER SOURCE AND 7.0 VOLTS MAXIMUM POWER SOURCE |